Microprocessors and Interfacing
Machine Control Instructions; Worked 8085 Programs
C-CAT
Machine Control Instructions
| Instruction | Function |
|---|---|
| HLT | Stop execution; buses go high-impedance; waits for interrupt |
| NOP | No operation — used for timing delays (4T) |
| EI | Enable maskable interrupts |
| DI | Disable maskable interrupts |
| SIM | Set interrupt masks and serial output |
| RIM | Read interrupt masks and serial input |
Worked 8085 Programs
20.1 Program 1 — ADD, CMA, Flag Analysis
MVI D, 8BH ; D = 8BH = 1000 1011B
MVI C, 6FH ; C = 6FH = 0110 1111B
INR C ; C = 70H = 0111 0000B
MOV A, C ; A = 70H
ADD D ; A = 70H + 8BH = FBH
CMA ; A = complement of FBH = 04H
OUT PORT1
HLT
After ADD (A = FBH = 1111 1011B):
| Flag | Value | Reason |
|---|---|---|
| S | 1 | MSB = 1 (FBH is "negative" in signed view) |
| Z | 0 | Result ≠ 0 |
| AC | 0 | No nibble carry at bit 3→4 |
| P | 0 | Odd number of 1s (seven 1s) |
| CY | 0 | No carry beyond bit 7 |
After CMA (A = 04H = 0000 0100B):
| Flag | Value | Reason |
|---|---|---|
| S | 0 | MSB = 0 |
| Z | 0 | Result ≠ 0 |
| P | 1 | Even number of 1s (one 1 — actually odd; verify: 04H = 00000100 has one 1 → P=0) |
Correction for 04H: one 1-bit → odd parity → P = 0
Output on OUT PORT1: 04H
20.2 Program 2 — SUB, ANI, ORA, RRC, CMC
MVI C, 39H ; C = 39H
MVI A, 30H ; A = 30H
DCR C ; C = 38H
SUB C ; A = 30H - 38H = F8H (2's complement)
MVI B, 9FH ; B = 9FH
ANI 80H ; A = F8H AND 80H = 80H
ORA B ; A = 80H OR 9FH = 9FH
RRC ; Rotate right; CY=0 before → A = 4FH, CY = 1
CMC ; Complement carry → CY = 0
OUT PORT1
HLT
After SUB C: A = F8H (borrow occurred → CY = 1) After ANI 80H: A = 80H; P = 0 (one 1-bit), Z = 0 After ORA B: A = 9FH After RRC (with CY=0): A = 4FH, CY = 1 (LSB of 9FH = 1 shifted into carry) After CMC: CY = 0 Final output: A = 4FH
20.3 Program 3 — Conditional Jump (ADI, JC)
MVI A, 8FH ; A = 8FH
ADI 72H ; A = 8FH + 72H = 01H with CY = 1
JC DISPLAY ; Jump because CY = 1
OUT PORT1
HLT
DISPLAY:
XRA A ; A = 00H (XOR A with A)
OUT PORT1
HLT
After ADI 72H: A = 01H, CY = 1 (8FH + 72H = 101H) JC is conditional — taken because CY = 1 XRA A: A = 00H Output displayed: 00H
20.4 Program 4 — LDA, Rotate, XRA
; Memory[2050H] = 73H
LDA 2050H ; A = 73H = 0111 0011B
MOV B, A ; B = 73H
STC ; CY = 1
CMC ; CY = 0
RAR ; Rotate right through carry
XRA B ; XOR A with B
STA 3050H
HLT
After RAR (CY=0 before rotate): LSB of 73H (1) → CY; A = 0011 1001B = 39H After XRA B: A = 39H XOR 73H = 4AH Memory[3050H] = 4AH
20.5 Program 5 — LHLD, XCHG, SHLD
; Memory[2050H] = 3FH, Memory[2051H] = 42H
LXI D, 856FH ; DE = 856FH (not used further in data path)
LHLD 2050H ; L = 3FH, H = 42H → HL = 423FH
XCHG ; Exchange DE ↔ HL; now DE = 423FH, HL = 856FH
SHLD 2050H ; Store HL (856FH) back to 2050H/2051H
HLT
After LHLD: HL = 423FH After XCHG: DE = 423FH, HL = 856FH After SHLD 2050H: Memory[2050H] = 6FH, Memory[2051H] = 85H
20.6 Program 6 — CMP and Flags
MVI A, 50H ; A = 50H
MVI B, 20H ; B = 20H
CMP B ; Compare: 50H vs 20H → A > B
MOV A, B ; A = 20H
HLT
After CMP B: A > B → CY = 0, Z = 0 After MOV A, B: A = 20H (flags unchanged by MOV)
20.7 Program 7 — CMA and 2's Complement via ADI 01H
; Memory[3000H] = 05H
LDA 3000H ; A = 05H
CMA ; A = FAH (1's complement)
STA 3001H ; Store FAH at 3001H
ADI 01H ; A = FAH + 01H = FBH (2's complement of 05H)
STA 3002H
HLT
CMA of 05H: FAH stored at 3001H ADI 01H: FBH (which is the 2's complement of 05H) stored at 3002H
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