Microprocessors and Interfacing
Logical Instructions; Branch Instructions; Stack Operations
C-CAT
Logical Instructions
| Mnemonic | Description | Example |
|---|---|---|
| ANA | AND register with A | ANA B |
| ANI | AND immediate with A | ANI F0H |
| ORA | OR register with A | ORA C |
| ORI | OR immediate with A | ORI 39H |
| XRA | XOR register with A | XRA A (clears A) |
| XRI | XOR immediate with A | XRI 52H |
| CMA | Complement A (1's complement) | CMA |
| CMC | Complement carry flag | CMC |
| STC | Set carry flag | STC |
| CMP | Compare (subtract without storing) | CMP B |
| CPI | Compare immediate | CPI 80H |
16.1 Rotate Instructions
| Mnemonic | Operation |
|---|---|
| RLC | Rotate A left; MSB → C and bit 0 |
| RRC | Rotate A right; LSB → C and bit 7 |
| RAL | Rotate A left through carry |
| RAR | Rotate A right through carry |
16.2 Compare (CMP) and Flags
| Relation | CY | Z |
|---|---|---|
| A < operand | 1 | 0 |
| A = operand | 0 | 1 |
| A > operand | 0 | 0 |
Branch Instructions
17.1 Unconditional Branch
JMP 2050H ; PC ← 2050H
17.2 Conditional Jumps
| Instruction | Condition | Flag test |
|---|---|---|
| JC | Jump if carry | CY = 1 |
| JNC | Jump if no carry | CY = 0 |
| JZ | Jump if zero | Z = 1 |
| JNZ | Jump if not zero | Z = 0 |
| JP | Jump if positive | S = 0 |
| JM | Jump if minus | S = 1 |
| JPE | Jump if even parity | P = 1 |
| JPO | Jump if odd parity | P = 0 |
17.3 CALL and RETURN
CALL pushes return address (PC) on stack and jumps to subroutine. RET pops return address and resumes.
Conditional CALL: CC, CNC, CZ, CNZ, CM, CP, CPE, CPO Conditional RET: RC, RNC, RZ, RNZ, RM, RP, RPE, RPO
CALL is a 3-byte instruction (opcode + 16-bit address).
Stack Operations
The stack is a LIFO (Last In, First Out) memory structure used for subroutine return addresses and saving register context.
18.1 PUSH Rp
- Decrement SP by 1
- Store high byte of register pair at [SP]
- Decrement SP by 1
- Store low byte of register pair at [SP]
PUSH B ; Push BC onto stack
PUSH H ; Push HL onto stack
18.2 POP Rp
- Load low byte from [SP] into register pair
- Increment SP by 1
- Load high byte from [SP] into register pair
- Increment SP by 1
18.3 Worked Stack Example
LXI SP, 2099H
LXI H, 2150H
LXI B, 2280H
MOV A, M
PUSH H
PUSH B
POP H ; HL now contains what was in B (2280H) — LIFO!
POP B ; BC now contains what was in H (2150H)
HLT
Key insight: POP order reverses PUSH order due to LIFO.
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