Microprocessors and Interfacing

Instruction Categories; Data Transfer Instructions; Arithmetic Instructions

C-CAT

Instruction Categories

8085 instructions are classified into five major groups:

CategoryAffects flags?Purpose
Data TransferNoCopy data without modifying source
ArithmeticYesAdd, subtract, increment, decrement
LogicalYesAND OR, XOR, compare, rotate
BranchNoChange program sequence (conditional/unconditional)
Machine ControlNoHalt, interrupt enable/disable, NOP

Data Transfer Instructions

Data transfer instructions copy data — they do NOT modify the source and do NOT affect flags.

MnemonicFormatDescriptionExample
MVIMVI Rd, dataMove immediate 8-bit to registerMVI A, 50H
MOVMOV Rd, RsCopy register to registerMOV B, A
MOVMOV Rd, M / MOV M, RsVia memory pointer HLMOV A, M
LXILXI Rp, 16-bitLoad immediate to register pairLXI H, 2050H
LDALDA addrLoad accumulator directLDA 2005H
STASTA addrStore accumulator directSTA 3000H
LDAXLDAX B/DLoad A indirect via BC/DELDAX B
STAXSTAX B/DStore A indirect via BC/DESTAX D
LHLDLHLD addrLoad HL pair direct from memoryLHLD 2050H
SHLDSHLD addrStore HL pair direct to memorySHLD 2050H
XCHGXCHGExchange DE and HL contentsXCHG
ININ portRead from I/O port to AIN 10H
OUTOUT portWrite A to I/O portOUT 05H

Arithmetic Instructions

MnemonicDescriptionExample
ADDAdd register/M to AADD B
ADIAdd immediate to AADI 50H
ADCAdd with carryADC C
SUBSubtract register/M from ASUB B
SUISubtract immediate from ASUI 34H
SBBSubtract with borrowSBB D
INRIncrement register/M by 1INR C
DCRDecrement register/M by 1DCR C
INXIncrement register pair by 1INX H
DCXDecrement register pair by 1DCX B
DADAdd register pair to HLDAD D

Note: INR and DCR do NOT affect the carry flag — an important exam point.

Data Transfer Details

Data-transfer instructions copy data without conceptually changing the source. Register transfers use MOV. Immediate instructions such as MVI place a constant in a register or memory. LXI loads a 16-bit constant into a register pair. Direct instructions include LDA and STA. LDAX and STAX use the address in BC or DE. LHLD and SHLD transfer two consecutive memory bytes with the low byte at the lower address.

Most data-transfer instructions do not change flags. This distinction matters because a later conditional branch may still test flags produced by an earlier arithmetic or logical instruction.

Arithmetic Details

ADD and ADC add a register or memory value to the accumulator, with ADC including carry. ADI and ACI use immediate data. Subtraction instructions set carry to represent borrow according to 8085 convention. INR and DCR change an 8-bit operand without changing carry. INX and DCX change a register pair and do not affect flags.

DAD adds a register pair to HL and affects carry. DAA adjusts the accumulator after adding packed BCD digits by applying corrections to the lower and upper nibbles according to auxiliary carry, carry and digit values. Signed overflow is not represented by a dedicated 8085 flag and must be inferred when signed arithmetic is required.

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