Registers of 8085; Flag Register

Registers of 8085

The 8085 contains seven 8-bit registers (A, B, C, D, E, H, L), two 16-bit registers (PC, SP) and two temporary 8-bit registers (W, Z) not accessible to the programmer.

3.1 Accumulator (A)

• Size: 8-bit
• Role: Primary register for arithmetic, logical, I/O and load/store operations
• Connection: Directly linked to ALU and internal data bus
• Exam note: Most arithmetic/logical instructions implicitly use A as one operand and store the result in A

3.2 General-Purpose Registers — B, C, D, E, H, L

Register pairs hold 16-bit data: e.g., if B = 22H and C = 11H, then BC = 2211H (B is high byte).

3.3 Program Counter (PC)

• Size: 16-bit
• Function: Holds the memory address of the next instruction to be fetched
• Update: Automatically incremented after each opcode fetch; loaded with branch/call/interrupt target address when control transfers
• Reset value: 0000H (8085 starts executing from 0000H after RESET)

3.4 Stack Pointer (SP)

• Size: 16-bit
• Function: Points to the top of the stack in memory
• Stack growth: Downward — SP decrements on PUSH, increments on POP
• PUSH/POP step: Always changes SP by 2 (one 16-bit word)
• SP does NOT point to the byte pushed last in the conventional "high address" sense — it points to the next free location below the current stack top

3.5 Temporary Registers W and Z

• Size: 8-bit each
• Access: Not accessible to programmer via instructions

Use: Internal holding registers during complex operations (e.g., processing 16-bit addresses during CALL, PUSH or memory indirect operations)

• W and Z are NOT general-purpose registers

3.6 Register Summary Table

Flag Register

The flag register (also called Status Register or Processor Status Word — PSW) is an 8-bit register, but only five bits (D7–D1) are used as flags. Bits D5 and D3 are unused (marked - in datasheets).

4.1 Bit Layout

Bit: D7 D6 D5 D4 D3 D2 D1 D0
 ┌────┬────┬────┬────┬────┬────┬────┬────┐
 │ S │ Z │ - │ AC │ - │ P │ C │ │
 └────┴────┴────┴────┴────┴────┴────┴────┘
Flag: Sign Zero Aux Parity Carry
 Carry

4.2 How Each Flag Is Set — Detailed Rules

Sign Flag (S)

• Set if D7 of the result = 1 (result interpreted as signed negative in 2's complement)
• Example: ADD produces A = 80H → S = 1

Zero Flag (Z)

• Set if result = 00H (all bits zero)
• Example: SUB makes A = 00H → Z = 1

Auxiliary Carry Flag (AC)

• Set when there is a carry from bit 3 into bit 4 during addition or borrow from bit 4 to bit 3 during subtraction
• Critical for BCD (Binary Coded Decimal) arithmetic adjustment (DAA instruction)
• Example: ADD 0FH + 01H = 10H → carry from lower nibble → AC = 1

Parity Flag (P)

• Set if result has even number of 1s in the lower 8 bits (even parity)
• Reset if odd number of 1s
• Example: A = 00000001B (one 1) → P = 0 (odd); A = 00000011B (two 1s) → P = 1 (even)

Carry Flag (C / CY)

• Set if operation produces carry beyond bit 7 (unsigned overflow)
• In subtraction: set if minuend < subtrahend (borrow needed)
• Also affected by rotate-through-carry instructions (RAL, RAR)
• STC sets carry; CMC complements carry

4.3 Which Instructions Affect Flags?